VL7724S
VL7724S
产品特点
· A-PHY解串芯片,4路Link,2/3.2/4/6.4/8Gbps
· 全速率支持 Coax/STP, Up to 15m
· 功耗:低于目前已知同类产品
· QFN56 8mmx8mm 兼容现有市场主流芯片封装
· TSMC车规工艺, 成本优于主流国外厂商
产品规格
A-PHY input
4-port Receiver with independently Configurable
MIPI A-PHY & HSMT standard PAL_I2C,PAL_CSI, PAL_GPIO
Support Coax/STP up to 15m a all speed
Downlink:2/3.2/4/6.4/8Gbps data rates, Uplink: 100Mbps
MIPI CSI-2
Output
C/D-PHY Combo CSl x 2 Output
D-PHY can be configured as 2x4,4x2 lanes, Up to 2.5 Gbps per lane, up to 16 virtual channels
C-PHY up to 5.7Gbps/Lane, 4 lanes
I2C
Master and Slave mode 100KHz~1MHz
Clock output
Local precision CLK output
Package
QFN56, compatible with 3rd party
Temperature
Working temperature:-40℃~105℃
Qualification
AEC-Q100 Grade 2 qualified
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